1. Technical Field
The present disclosure relates generally to integrated circuits and, in particular, to improved routing architectures for a programmable logic device.
2. Description of the Background Art
A programmable logic device (“PLD”) is a digital, user-configurable integrated circuit used to implement a custom logic function. PLDs have found particularly wide application as a result of their combined low up front cost and versatility to the user. For the purposes of this description, the term PLD encompasses any digital logic circuit configured by the end-user, and includes a programmable logic array (“PLA”), a field programmable gate array (“FPGA”), and an erasable and complex PLD.
The basic building block of a PLD is a logic element that is capable of performing logic functions on a number of input variables. The logic elements of a PLD may be arranged in groups of, for example, eight to form a larger logic array block (“LAB”).
Multiple LABs (and other functional blocks, such as memory blocks, digital signal processing blocks, and so on) are generally arranged in a two-dimensional array in a PLD core. The blocks may be separated by horizontal and vertical interconnect channels so as to form a two-dimensional array. Inputs and outputs of the LABs may be programmably connectable to horizontal and vertical interconnect channels.
A variety of PLD architectural approaches to arranging the interconnect array and logic elements have been developed. These approaches generally aim to optimize logic density and/or signal routability between the various logic elements.